Every inference engine has to guess.
Tribunus Compute doesn't.

Every inference path is decided before the first token is generated. The compiler owns placement, memory layout, kernel selection, and fallback policy — the runtime merely replays the resulting compute image.

• PhaseIR — canonical model representation consumed by all backends. Ops, shapes, dtypes, layouts, quantization metadata in a single IR.
• Backend candidates — per-operation kernel variants from Triton, cuBLASLt, Metal 3, rocBLAS, oneDNN, TT-NN, and custom Metal/AMD/Intel kernels.
• 6-check admission — oracle, shape, layout, timing, replay, and cache-key checks gate every candidate.
• Compute image — frozen artifact containing prequalified backend code, placement manifest, memory layout, and evidence receipts.

A 4-tier oracle establishes ground truth per operation, per backend, eliminating silent numerical drift.

• 4-tier oracle — Apple Silicon FP32 → CUDA FP32 → Vulkan FP32 → theoretical bound (in descending priority). The highest available tier certifies pass/fail.
• Per-op tolerance matrix — matmul = 1 ULP, softmax = 2 ULP, layer_norm = 1 ULP. Each operation type has a published tolerance in the governance spec.
• Autotuning cache — 6-tier key: backend × op × dtype × shape × batch × quant. A cache miss triggers full re-evaluation at compile time.

Each backend is a first-class compilation target with its own candidate generator, admission checks, and runtime lane. The compiler produces backend-specific code regions bound into a single compute image.

• Apple Silicon — Metal 3 (GPU), Indirect Command Buffers (ICMD), ANE coprocessor via Core ML MIL islands
• NVIDIA — CUDA Graphs, cuBLASLt, Triton, CUTLASS
• AMD — ROCm, rocBLAS, Triton HIP, Vulkan
• Intel — oneDNN, Level Zero, Triton XPU
• Tenstorrent — TT-NN, TT-Metalium

Inference is a deterministic state machine over six precompiled pipeline stages. Each stage has a fixed memory budget, known shapes, and prequalified backend regions.

1. Token Intake — radix-tree prefix cache, tokenizer embedded in compute image
2. Prefill — chunked flash attention, KV page write-once
3. Decode — precompiled CUDA Graphs / Metal ICMD, weight-staging ring
4. KV Management — hot → compressed tier migration, generation counters
5. Speculation — ANE → CPU → GPU multi-device pipeline with tree verification
6. Output — Accelerate logits, Aho-Corasick stop detection, SSE streaming, tool calling

Semi-trusted peer networks for mutual-aid inference. Devices share compute capacity across a privacy-respecting federation with quorum-verified execution.

• KV cache — privacy-classified social object with generation counters and access control
• Transport — abstracted: local IPC, LAN, QUIC, WebRTC
• Quorum verification — execution receipts from multiple peers guarantee correctness without trusting any single peer
• Peer discovery — DHT-based with capability advertisements (backend type, free capacity, latency profile)

11 RealizerError types cover every failure mode from compilation through runtime replay. Every error is typed, structured, and actionable.